/*+***********************************************************************************
 Filename: 9k_mcu01_mycore_v001\src\top.v
 Description: a simple MCU with rom only for demo instruction fetch and decode.

 Modification:
   2025.08.15 Creation   H.Zheng
              porting from previous design.

Copyright (C) 2024-2025  Zheng Hui (hzheng@gzhu.edu.cn)

License: MulanPSL-2.0

***********************************************************************************-*/

module top (
  input wire [1:0] button,
  input wire sys_clk,
  output wire [5:0] led
);

  //reset signals
  wire reset_n = button[1];


  //core
  wire [31:0] ibus_addr;
  wire [31:0] instruction;
  wire [31:0] monitor_port;

  core m_core(
    .clk(sys_clk),
    .rst_n(reset_n),
    .ibus_addr(ibus_addr),
    .instruction_i(instruction),
    .monitor_port(monitor_port)
 );

  //rom
  rom_async I_ROM(
    .addr(ibus_addr[14:2]), 
    .dout(instruction)
  );

  //output
  assign led = ~monitor_port[29:24];

endmodule